Semiconductor device

ABSTRACT

A bump of a semiconductor device is made up of an aluminum layer formed by sputtering. The height of the projecting terminal is sufficiently higher than those of the other parts, and the uppermost surface of the bump is covered with a conductive film preventing oxidation of films, such as a transparent conductive film.

TECHNICAL FIELD

This invention relates to a semiconductor device comprising bumps thatare suitable for mounting on a circuit board with an anisotropicconductive film therebetween.

BACKGROUND TECHNOLOGY

Recently, a semiconductor device for surface mounting comprising bumps(projecting terminals) capable of electrically and mechanicallyconnecting to a circuit board has been often used.

The structure of the bump in such a conventional semiconductor deviceand a fabricating method thereof will be briefly described withreference to FIG. 14A to FIG. 14D. Incidentally, these drawings aresectional views, but oblique lines showing sections are omitted.

FIG. 14D shows a section of the bump and thereabout of a completesemiconductor device.

On the surface of a silicon wafer 213 which is cut into semiconductorchips, a selective oxide (LOCOS) film 204 which is a layer necessary forfabricating a semiconductor device is provided, and an aluminum layer702 is provided on the selective oxide (LOCOS) film 204. This aluminumlayer 702 is a layer necessary to input and output a power supply or asignal to/from interconnections in the semiconductor device and anintegrated circuit from/to the outside.

On top of that, a passivation film 703 which is an insulation protectionfilm covering the entire face of the silicon wafer 213 is provided, andan opening portion 703 a is formed in the passivation film 703 on thealuminum layer 702. A gold bump 701 which is mushroom shaped is providedfrom the aluminum layer 702 within the opening portion 703 a extendingonto the passivation film 703 around the opening portion 703 a with anoble metal film 705 therebetween.

In this drawing, only one bump is shown, but many bumps are provided ina real semiconductor chip.

FIG. 14A to FIG. 14C are views showing the mid-steps of the fabricationof this semiconductor device.

As shown in FIG. 14A, the selective oxide film 204 is formed on thesilicon wafer 213, and the aluminum layer 702 which is connected to theinternal integrated circuit is formed at a necessary position on theselective oxide film 204. The passivation film 703 which covers theentire face of the silicon wafer 213 including the aluminum layer 702 isformed, and the opening portion 703 a for establishing connection withthe outside is formed on the aluminum layer 702.

Then, as shown in FIG. 14B, the noble metal film 705 is formed on theentire faces of the passivation film 703 and the aluminum layer 702, andfurther a photosensitive resist 710 is selectively (except for a bumpformation region) formed on the noble metal film 705.

The noble metal film 705 is a noble metal layer such as an alloy oftitanium and tungsten, or the like and has a function as an electrodefor producing the gold bump 701, which is formed on the aluminum layer702 in a subsequent step, by electro-plating, and another function ofimproving the connection between the aluminum layer 702 and the goldbump 701.

This noble metal film 705 is formed by being laminated on the entiresurface in a vacuum apparatus.

Next, as shown in FIG. 14C, a gold layer is produced in a portion inwhich the resist 710 is not formed by the electro-plating step to formthe gold bump 701 which is the mushroom shaped bump electrode.

Then, after the resist 710 is removed, the noble metal layer 705 isremoved with the gold bump 701 as a mask with only a portion thereofunder the gold bump 701 left. FIG. 14D is a sectional view of thisstate.

Through such process steps, the bump electrodes of the gold bumps 701are formed on the silicon wafer 213, and the silicon wafer 213 is cutinto discrete semiconductor chips to complete semiconductor devices.

However, in the semiconductor device comprising such conventional bumps,since a plating process which is hard to manage is employed for makingup the bumps, the bumps are prone to be nonuniform in height, andadditionally, the use of costly gold for the material of the bumpsresults in a high cost of production.

The present invention is made to solve such problems and its object isto make it possible to easily fabricate bump electrodes of asemiconductor device at low cost and to make the height of the bumpsuniform.

Moreover, another object is to make it possible that the height of amost projecting end face of the bump is sufficiently higher than thoseof projecting faces of any other parts of the semiconductor device inorder that the bump can be surely electrically connected to aninterconnection on a circuit board when such a semiconductor device ismounted on the circuit board with an anisotropic conductive filmtherebetween, and that an effective area of the end face is made largeto catch a plurality of conductive particles.

DISCLOSURE OF THE INVENTION

To achieve the above object of the present invention, a semiconductordevice comprising a polysilicon layer used for an interconnection and agate of a transistor, an insulation layer covering thie polysiliconlayer, an interconnection conductor layer formed on the insulationlayer, and a bump for inputting and outputting a power supply or asignal to an integrated circuit, on the surface of a semiconductor chipin which the integrated circuit is formed, is structured as follows.

A polysilicon film and an insulation film made of the same materials asthose of said polysilicon layer and said insulation layer are providedat a region at which the bump is formed, on the surface of thesemiconductor chip; a first conductor which covers the insulation filmand is electrically connected to the interconnection conductor layer ismade of the same material as that of the interconnection conductor layerby sputtering; a protection insulation film which covers the surfaces ofthe first conductor, the interconnection conductor layer, and thesemiconductor chip and in which an opening portion is provided on thefirst conductor is formed; a second conductor which conducts to thefirst conductor through the opening portion is formed on the protectioninsulation film by sputtering.

Further, the bump is composed of the polysilicon film, the insulationfilm, the first conductor, and the second conductor, and is formed sothat a height of a most projecting end face thereof from the surface ofthe semiconductor chip is higher than those of projecting faces of anyother parts.

Also in this case, each of the aforesaid first conductor and the secondconductor can be made of aluminum.

Moreover, it is preferable that the most projecting end face of the bumpis covered with a conductive film for preventing surface oxidation, thatis, a conductive oxidation film or a noble metal film.

In the case where the aforesaid bump is composed of the aforesaid firstconductor and the second conductor which conducts to the first conductorthrough the opening portion formed in the protection insulation filmcovering the first conductor, the film thickness of the protectioninsulation film at the region under the second conductor is formedthicker than that of the other region, thereby increasing the bump'sheight.

Further, in the present invention, a semiconductor device comprising abump, on the surface of a semiconductor chip in which an integratedcircuit is formed, for inputting and outputting a power supply or asignal to the integrated circuit and mounted on a substrate with ananisotropic conductive film containing a large number of conductiveparticles therebetween is structured as follows.

On the surface of the semiconductor chip, a first conductor which iselectrically connected to the integrated circuit; a protectioninsulation film which covers the surfaces of the first conductor and thesemiconductor chip and in which a through hole is formed on the firstconductor; and a second conductor which is formed on the protectioninsulation film by sputtering and conducts to the first conductorthrough the through hole, are provided, wherein the bump is composed ofthe first conductor and the second conductor, and is formed so that aheight of a most projecting end face thereof from the surface of thesemiconductor chip is higher than those of projecting faces of any otherparts by an error in diameter of the large number of conductiveparticles contained in the anisotropic conductive film or more.

It is desirable that a maximum opening dimension of the through holeformed in the protection insulation film is within 1.5 times a minimumdiameter of the large number of conductive particles contained in theanisotropic conductive film.

Moreover, it is acceptable that the through hole formed in theprotection insulation film is composed in shape of a square, arectangle, a polygon, a circle, or an ellipse, or a plurality of throughholes in these different shapes.

The second conductor is formed in an area larger than a region withinwhich a step is formed at the protection insulation film caused by astep of the first conductor, thereby increasing an effective area of themost projecting end face of the bump.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a sectional view of a bump and thereabout having a two-layeredaluminum structure showing a first embodiment of a semiconductor deviceaccording to the present invention;

FIG. 2A to FIG. 2F are sectional views showing the fabricating steps ofthe bump of the semiconductor device;

FIG. 3 is a sectional view of a bump and thereabout having athree-layered aluminum structure showing a second embodiment of thesemiconductor device according to the present invention;

FIG. 4A to FIG. 4F are sectional views showing the fabricating steps ofthe bump of the semiconductor device;

FIG. 5 is a sectional view of a bump and thereabout having a polysiliconlayer and a two-layered aluminum structure showing a third embodiment ofthe semiconductor device according to the present invention;

FIG. 6A to FIG. 6D are sectional views showing the fabricating steps ofthe bump of the semiconductor device;

FIG. 7 is a sectional view of a bump and thereabout with a thickpassivation film showing a fourth embodiment of the semiconductor deviceaccording to the present invention;

FIG. 8A to FIG. 8D are views of the fabricating steps of the bump of thesemiconductor device;

FIG. 9A to FIG. 9D are sectional views showing the surface processingsteps of the bump in a fifth embodiment of the semiconductor deviceaccording to the present invention;

FIG. 10 is a sectional view of a principal portion showing an example ofa structure of the semiconductor device according to the presentinvention mounted on the substrate;

FIG. 11 is a plane view of a bump and a protection insulation film shownin FIG. 10;

FIG. 12 is a view in which a plane view and a sectional view of a bumpand thereabout are corresponding with each other in a sixth embodimentof the semiconductor device according to the present invention;

FIG. 13 is a view in which a plane view and a sectional view of a bumpand thereabout are corresponding with each other in a seventh embodimentof the semiconductor device according to the present invention; and

FIG. 14A to FIG. 14D are sectional views showing the fabricating stepsand the structure of a bump in a conventional semiconductor device.

BEST MODE FOR CARRYING OUT THE INVENTION

In order to describe this invention in more detail, preferredembodiments of this invention will be explained using the drawings.

First Embodiment

FIG. 1 and FIG. 2A to FIG. 2F

FIG. 1 is a sectional view showing only a bump and thereabout of thefirst embodiment of the semiconductor device according to the presentinvention.

In this semiconductor device, a selective oxide (LOCOS) film 204 isformed on the surface of a semiconductor chip 100. The selective oxidefilm 204 is an oxide layer of the surface of a silicon wafer beforebeing cut into semiconductor chips, formed by heat treatment, and it isa layer necessary to fabricate the semiconductor device. It should benoted that an integrated circuit comprising many active elements such astransistors and the like, passive elements such as capacitors,resistors, and the like, and interconnections for connecting them isformed in this semiconductor chip 100 though the illustration thereof isomitted.

On the selective oxide film 204, a first aluminum layer 202 which is afirst conductor to be an electrode pad for inputting and outputting apower supply and a signal from the outside is formed. An aluminum layer212 is a layer of aluminum for the interconnections in the semiconductordevice and is formed by being deposited in a vacuum apparatussimultaneously with the first aluminum layer 202 and thereafterpatterned. The aluminum layers 202 and 212 normally have a thickness ofabout 1 micron (μm).

A polysilicon layer 205 is an interconnection of the semiconductordevice and is formed by being deposited in the vacuum apparatus, andnormally has a thickness of about 0.5 micron (μm).

An insulation layer 210 is an insulation film formed on the polysiliconlayer 205, and is formed by heat treatment of the polysilicon layer 205,and normally has a thickness of about 0.5 micron (μm).

A passivation film 203 is a protection insulation film formed for thesake of protecting the elements in the semiconductor device.

The passivation film 203 is formed by being deposited in the vacuumapparatus and normally has a thickness of about 0.8 micron (μm). Anopening portion 203 a is formed in the passivation film 203 on the firstaluminum layer 202.

A second aluminum bump 201 is a conductor which forms a bump 200 and isformed within the opening portion 203 a in the passivation film 203 bysputtering in the vacuum apparatus, and conducts to the first aluminumlayer 202 via the opening portion 203 a and has a thickness of about 2micron (μm).

The height of a most projecting end face 200 a of the bump 200 from thesurface of the semiconductor chip 100 is a value of the sum of thethickness of the first aluminum layer 202, the thickness of thepassivation film 203, and the thickness of the second aluminum bump 201,and is higher than a value of the sum of the thicknesses of thepassivation film 203, the polysilicon layer 205, the insulation layer210, and the aluminum layer 212, which is a projecting face of the otherpart, only by a dimension shown by an H in FIG. 1. The difference H inheight is at least about 1 micron (μm).

FIG. 2A to FIG. 2F are sectional views of the opening portion andthereabout in the passivation film 203, showing the steps of making upthe bump of the semiconductor device shown in FIG. 1, but oblique linesshowing sections are omitted.

FIG. 2A shows a state where the selective oxide (LOCOS) film 204 and anintegrated circuit (not shown) are formed on a silicon wafer 213, andthe first aluminum layer 202 and the passivation film 203 having theopening portion 203 a are formed, and then processing (back sputterprocessing) which removes the oxide film formed on the aluminum layer202 at the opening portion 203 a through the agency of argon atoms inthe vacuum apparatus by sputtering or the like, and thereafter a secondaluminum layer 214 is continuously formed on the entire face by asputtering apparatus.

FIG. 2B shows a state where a transparent conductive film 207 which is aconductive film for preventing surface oxidation is formed on the entireface of the second aluminum layer 214. This transparent conductive film207 can be made of indium tin oxide (ITO), and it is also suitable touse a noble metal such as gold, or copper, titanium, tantalum, or thelike as the conductive film for preventing surface oxidation.

Then, as shown in FIG. 2C, a photosensitive resist 208 is applied on theentire face of the second aluminum layer 214 on which the transparentconductive film 207 is formed and then patterned by exposure with ametal mask, resulting in the state shown in FIG. 2D.

As shown in FIG. 2E, the transparent conductive film 207 and the secondaluminum layer 214 are patterned by etching by means of a vacuum etchingapparatus with the resist 208 as a mask to form the second aluminum bump201 which is a second conductor.

The state where the resist 208 is removed thereafter is shown in FIG.2F. Then, the silicon wafer 213 is cut into individual semiconductorchips 100, thereby completing the semiconductor device comprising thebumps 200 shown in FIG. 1.

The structure of the bump 200 of this semiconductor device is astructure that can be easily formed in the fabrication process of anordinary semiconductor device.

Here, in place of aluminum used for the first and second conductors inthis embodiment, a conductor such as gold, copper, titanium, tantalum,or the like may be used.

Second Embodiment

FIG. 3 and FIG. 4A to FIG. 4F

FIG. 3 is a view similar to FIG. 1, showing the second embodiment of thesemiconductor device according to the present invention, and the samenumerals and symbols are given to portions corresponding to those inFIG. 1 and the description thereof is omitted.

In this embodiment, a third aluminum bump 314 is further provided on thestructure shown in FIG. 1 to form a bump 200 for the sake of making adifference H in height of the bump 200 larger than that in thesemiconductor device shown in FIG. 1.

In other words, in this semiconductor device, a second aluminum bump 301which is a second conductor is provided on a passivation film 203 and anopening 203 a, and a second passivation film 313 provided with anopening portion 313 a on the second aluminum bump 301 is formed on thepassivation film 203.

Then, the third aluminum bump 314 conducting to the second aluminum bump301 via the opening portion 313 a of the second passivation film 313 isprovided on the second passivation film 313 to make up the bump 200.

Accordingly, the height of a most projecting end face 200 a of the bump200 is a value of the sum of the thickness of a first aluminum layer202, the thickness of the passivation film 203, the thickness of thesecond aluminum bump 301, the thickness of the second passivation film313, and the thickness of the third aluminum bump 314. On the otherhand, the height of the projecting face of an interconnection portion isa value of the sum of the thicknesses of the passivation film 203, apolysilicon layer 205, an insulation layer 210, an aluminum layer 212,the passivation film 203, and the second passivation film 313, and thedifference H in height is larger than that in the semiconductor deviceshown in FIG. 1.

This structure can be obtained by forming the second passivation film313 and the third aluminum bump 314 on the second aluminum bump 301 inthe same process as that shown in the first embodiment.

FIG. 4A to FIG. 4F are views showing the steps of fabricating the bumpof the semiconductor device of this embodiment.

FIG. 4A is a view showing the sectional structure fabricated in the sameprocess as that described in the aforesaid first embodiment, in which inplace of the second aluminum bump 201 in the first embodiment, thesecond aluminum bump 301 which is thinner in thickness than the secondaluminum bump 201 is formed. This is because of relaxation of stress ofthe aluminum thin film and cost reduction.

FIG. 4B shows a state where the second passivation film 313, which is aprotection insulation film, is formed by being laminated on the entireface of the state in FIG. 4A.

The second passivation film 313 is made of the same material and nearlythe same in thickness as the passivation film 203.

Thereafter, a photoresist 802 is applied on the entire face of thesecond passivation film 313 and patterned to form an opening portion 802a at a bump formation region on the second aluminum bump 301 as shown inFIG. 4C.

Then, as shown in FIG. 4D, a portion of the second passivation film 313within the opening portion 802 a is removed by etching with thephotoresist 802 as a mask to form an opening portion 313 a at the bumpformation region.

Moreover, a third aluminum layer 805 is formed on the entire face of thesecond passivation film 313 including the inside of the opening portion313 a, and a photoresist 804 is applied and then patterned to remainonly at the bump formation region, resulting in the state shown in FIG.4E.

When the third aluminum layer 805 is formed, an oxidation film is oftenformed on the surface of the second aluminum layer 301 which is exposedwithin the opening portion 313 a of the second passivation film 313,thus it is desirable to remove the oxide film by performingback-sputtering in a vacuum.

Then, the third aluminum layer 805 is etched with the photoresist film804 as a mask to form the third aluminum bump 314 as shown in FIG. 4F,thereby completing the bump 200. Thereafter, the silicon wafer 213 iscut and divided into individual semiconductor chips 100, whereby thesemiconductor device shown in FIG. 3 is completed.

The structure of the bump 200 in this embodiment is also a structurethat can be easily formed in the fabrication process of an ordinarysemiconductor device.

Here, in this embodiment, since aluminum is used as the first, second,and third conductors, they can be fabricated at low cost, but if the endface of the bump is oxidized, electrical connection resistance thereofwith the circuit board side increases when it is mounted on the circuitboard. Therefore, it is suitable to form, for example, a transparentconductive film made of ITO or a noble metal film made of gold or thelike as a conduction film for preventing oxidation on the mostprojecting end face 200 a of the bump 200, that is the top face of thethird aluminum bump 314, as in the aforesaid embodiment.

All of the first, second, and third conductors or only the thirdaluminum bump 314 may be a conductor such as gold, copper, titanium,tantalum, or the like.

Further, it is also possible to further increase the bump in height bylaminating conductive layers by repeating the same processes as those ofthe fourth layer and the fifth layer by the same procedures.

Third Embodiment

FIG. 5 and FIG. 6A to FIG. 6D

FIG. 5 is a view similar to FIG. 1, showing the third embodiment of thesemiconductor device according to the present invention, and the samenumerals and symbols are given to portions corresponding to those inFIG. 1 and the description thereof is omitted.

In this embodiment, the height of a bump is increased by using apolysilicon layer used for an interconnection in the semiconductordevice and a gate of a transistor, and an insulation layer on thepolysilicon layer.

An under-bump polysilicon layer 413 is formed by depositing the samematerial as that of a polysilicon layer 205 used for the interconnectionin the semiconductor device and the gate of the transistor by sputteringor the like in a vacuum apparatus simultaneously when the polysiliconlayer 205 is formed, and normally has a thickness of about 0.5 micron(μm).

An under-bump insulation layer 412 is an insulation film formed on theunder-bump polysilicon layer 413 and formed by practicing heat-treatmentto the under-bump polysilicon layer 413 simultaneously with aninsulation layer 210 on the polysilicon layer 205, and normally has athickness of about 0.5 micron (μm).

A first aluminum layer 402 is also formed by being deposited bysputtering in the vacuum apparatus simultaneously with the aluminumlayer 212 for the interconnections in the semiconductor device andnormally has a thickness of about 1 micron (μm).

A passivation film 403 is a protection insulation film is formed for thesake of protecting elements in the semiconductor device and is formed bybeing deposited in the vacuum apparatus and normally has a thickness ofabout 0.8 micron (μm).

A second aluminum bump 401 is a conductor for forming a bump 200 and isalso formed by being deposited by sputtering in the vacuum apparatus,and has a thickness of about 2 micron (μm).

An opening portion 403 a in the passivation film 403 is an opening forobtaining conduction between the first aluminum layer 402 which is aconductor and the second aluminum bump 401 for establishing connectionto the outside.

The height of a most projecting end face 200 a of the bump 200 in thisembodiment is a value of the sum of the thickness of the first aluminumlayer 402, the thickness of the passivation film 403, the thickness ofthe second aluminum bump 401, the thickness of the under-bumppolysilicon layer 413, and the thickness of the under-bump insulationlayer 412. On the other hand, the height of a projecting face of theinterconnection portion is a value of the sum of the respectivethicknesses of the polysilicon layer 205, the insulation layer 210, thealuminum layer 212, and the passivation film 403, resulting in adifference H in height.

As for the structure of the semiconductor device, if the under-bumppolysilicon layer 413 and the under-bump insulation layer 412 are formedalso at the bump formation position in the forming step of thepolysilicon layer used as the gate of the transistor and theinterconnection, in the fabrication process of the semiconductor device,the second aluminum bump 401 can be formed in the same process as thatdescribed in the first embodiment.

FIG. 6A to FIG. 6D are sectional views showing the steps of fabricatingthe bump in the semiconductor device in this embodiment.

FIG. 6A is a view showing the sectional structure of a portion that ismade in the fabricating steps of the ordinary semiconductor device.

Here, the under-bump polysilicon layer 413, the under-bump insulationlayer 412, and the first aluminum layer 402 are respectively formedsimultaneously in the steps in which the polysilicon layer 205 necessaryfor the interconnection in the semiconductor device and the gate of thetransistor, the insulation layer 210, and the aluminum layer 212 areformed.

FIG. 6B shows a sectional structure when the surface of the firstaluminum layer 402 exposed within the opening portion 403 a of thepassivation film 403 is subjected to back-sputtering in a vacuum toremove an oxidation film and thereafter a second aluminum layer 701 islaminated by sputtering.

FIG. 6C shows a state where a photoresist 702 is applied on the secondaluminum layer 701 in FIG. 6B and patterned to remain only at a bumpformation region.

Then, the second aluminum layer 701 is etched with the photoresist 702as a mask to form the second aluminum bump 401 as shown in FIG. 6D,thereby making up the bump 200.

Thereafter, a silicon wafer 213 is cut and divided into individualsemiconductor chips 100, thereby completing the semiconductor devicecomprising the bumps 200 shown in FIG. 5.

As described above, the fabricating steps of the bump in this embodimentare the same as the fabrication process of the ordinary semiconductordevice, and thus it becomes unnecessary to particularly perform thesteps of making up the bumps after the division into the semiconductorchips.

Here, in place of aluminum used for the first and second conductors inthis embodiment, both of them or only the second conductor may be formedwith a conductor such as gold, copper, titanium, tantalum, or the like.

Further, it is preferable to form a conductive film for preventingoxidation such as a transparent conductive film or the like on the mostprojecting end face 200 a of the bump 200.

Fourth Embodiment

FIG. 7 and FIG. 8A to FIG. 8D

FIG. 7 is a view showing a bump and thereabout in the fourth embodimentof the semiconductor device according to the present invention, and thesame numerals and symbols are given to portions corresponding to thosein FIG. 1 and the description thereof is omitted.

In this embodiment, a passivation film 901 which is a protectioninsulation film formed for protecting elements in the semiconductordevice is formed with a thickness of about 0.8 micron (μm) at the normalregion but with a thickness of about 1.6 micron (μm), which is twicethat at the normal region, at an under-bump region 901 a under a secondaluminum bump 904 to thereby increase the height of a bump 200.

The second aluminum bump 904 is a conductor for forming the bump 200.The second aluminum bump 904 is formed by being deposited by sputteringin a vacuum apparatus and has a thickness of about 1 micron (μm).

An opening portion 901 b of the passivation film 901 is an opening forestablishing connection between a first aluminum layer 202 which is aconductor and the second aluminum bump 904.

The height of a most projecting end face 200 a of the bump 200 of thesemiconductor device is a value of the sum of the thickness of the firstaluminum layer 202, the thickness of the under-bump region 901 a of thepassivation film 901, and the thickness of the second aluminum bump 904.On the other hand, the height of a projecting face of an interconnectionportion is a value of the sum of the thickness of the passivation film901 at the normal region, the thicknesses of a polysilicon layer 205 andan insulation layer 210, and the thickness of an aluminum layer 212,resulting in a difference H in height of about 0.8 micron (μm).

FIG. 8A to FIG. 8D are views showing the steps of making up the bump ofthe semiconductor device of the fourth embodiment.

FIG. 8A is a sectional view showing the structure of a portion that ismade in the fabrication process of the ordinary semiconductor device.

On a silicon wafer 213, the polysilicon layer 205 for theinterconnection necessary for the semiconductor device and the gate ofthe transistor, the insulation layer 210, and the aluminum layer 212 areformed.

Moreover, the passivation film 901 for circuit protection is formed witha thickness of 1.8 micron (μm) which is twice the normal thickness.

After the surface of the first aluminum layer 202 exposed within theopening portion 901 b of the passivation film 901 is subjected toback-sputtering in a vacuum, a second aluminum layer 1003 is formed bybeing laminated on the entire face by sputtering as shown in FIG. 8B,and a photoresist 1002 is applied on the second aluminum layer 1003 andpatterned to remain at a bump formation region.

Then, the second aluminum layer 1003 is etched with the photoresist 1002as a mask to form the second aluminum bump 904 as shown in FIG. 8C.

Thereafter, the passivation film 901 is subjected to dry-etching withthe second aluminum bump 904 as a mask by a PI apparatus using a mixedgas of CF₄ and O₂. At that time, a power supply is reduced in order notto etch the second aluminum bump 904.

By the dry-etching, the passivation film 901 is etched to be about halfin thickness except for the region 901 a under the second aluminum bump904 as shown in 8D.

Thereafter, the silicon wafer 213 is cut and divided into individualsemiconductor chips 100, thereby completing the semiconductor devicecomprising the bumps 200 shown in FIG. 7.

According to this embodiment, since the fabricating steps of the bumpthereof is the same as the fabricating process of the ordinarysemiconductor device as described above, it is unnecessary to form thebumps after the division into semiconductor chips. In other words, asfor this semiconductor device, the bumps thereof can be easily formed inthe fabrication process of the ordinary semiconductor device.

Here, in place of aluminum which is used as the first and secondconductors in this embodiment, both of them or only the second conductormay be formed with a conductor such as gold, copper, titanium, tantalum,or the like.

Further, it is preferable to form a conductive film for preventingoxidation such as a transparent conductive film or the like on the mostprojecting end face 200 a of the bump 200.

Fifth Embodiment

FIG. 9A to FIG. 9D

The structure of the fifth embodiment which is made so as to prevent anincrease in connection resistance of a bump of the semiconductor deviceaccording to the present invention due to surface oxidation and thesurface processing steps thereof will be explained with FIG. 9A to FIG.9D.

In this embodiment, the processing steps in the case where the surfaceof the bump is covered with a transparent conductive film are shown.

FIG. 9A shows a sectional view when back-sputtering is performed for thesemiconductor device in which a first aluminum layer 202 and a secondaluminum bump 201 are formed on a silicon wafer 213 in a vacuumapparatus as in the aforesaid embodiments to clean the surface of thesecond aluminum bump 201, and thereafter a transparent conductive film501 made of ITO is sequentially formed by being laminated on the entiresurface by means of the same sputtering apparatus.

FIG. 9B shows a sectional view when a photoresist 510 is applied on theentire surface and patterned by exposure with a metal mask.

Then, the transparent conductive film 501 is etched with a liquid suchas an ordinary acid with the photoresist 510 as a mask, thereby removingthe transparent conductive film 501 except for a bump formation regionas shown in FIG. 9C.

Then, the photoresist 510 is removed, which brings about a state wherethe top face of the second aluminum bump 201 forming the uppermostportion of the bump and the surroundings thereof are completely coveredwith the transparent conductive film 501 as shown in FIG. 9D, therebypreventing conduction resistance from increasing due to oxidation of thesurface of the second aluminum bump 201.

The formation of the transparent conductive film at least on the mostprojecting end face of the bump is applicable to any one of the secondto fourth embodiments.

In place of the transparent conductive film made of ITO, a metal film ofgold, copper, titanium, tantalum, or the like may be formed to cover theend face of the bump as a conductive film for preventing oxidation.

According to the present invention, a semiconductor device comprisingbumps that are uniform in height and have a sufficient difference inheight can be fabricated at low cost.

Sixth Embodiment

FIG. 10 and FIG. 11

Next, the embodiment in the case of mounting the semiconductor deviceaccording to the present invention on a circuit board using ananisotropic conductive film will be explained.

FIG. 10 and FIG. 11 explain the semiconductor device of the aforesaidthird embodiment of the present invention by an example of the case ofmounting it on a glass substrate of a liquid crystal display panel. FIG.11 is a plane view of the bump 200 and the surroundings thereof, andFIG. 10 is a sectional view along an A—A line in FIG. 11.

The semiconductor chip 100 on which the bumps 200 are formed is mountedon a substrate 101 with an anisotropic conductive film (ACF) 110therebetween.

The substrate 101 is not limited to the glass substrate but a circuitboard such as a PCB or the like is acceptable. On the surface of thesubstrate 101, an electrode 102 is formed with a transparent conductivefilm (ITO or the like), copper foil, or the like.

Many conductive particles 111 are dispersed in the ACF, and thesemiconductor chip 100 is positioned with respect to the substrate 101holding the ACF therebetween and is heated while being pressed, wherebythe conductive particles are sandwiched between the electrode 102 andthe bumps 200, and become deformed to be slightly flattened so as toelectrically connect them.

When the minimum diameter of the conductive particles is D_(S) and themaximum diameter thereof is D_(M), it is desirable that the differencebetween the most projecting end face of the bump 200 and otherprojecting faces is the difference between the minimum diameter D_(S)and the maximum diameter D_(M) (an error in diameter of the conductiveparticles) or more.

The second aluminum bump 401 is an aluminum layer which is the center ofthe bump 200. The height of the second aluminum bump 401 is higher thanthat of the interconnection portion that is the next highest face inthis semiconductor device by only the H. If this difference in height issmall, it becomes impossible that the electrode 102 and the secondaluminum bump 401 connect each other through the conductive particles111 having the minimum diameter because of the particles having themaximum diameter sandwiched between the electrode 102 and theinterconnection portion.

On the other hand, in order to increase the height of the bump 200, thelamination time and the etching time for the second aluminum bump 401get longer, which results in not only increased cost but also cracks andstrains due to stress after the formation. In other words, it isimportant to make the bump to the required but minimum height.

In this embodiment, the second aluminum bump 401 is formed so as to belarger in height than the difference between the maximum conductiveparticle diameter and the minimum conductive particle diameter. Morespecifically, in the case where the minimum conductive particle diameteris 3 μm and the maximum conductive particle diameter is 5 μm, thedifference H in height is made larger than 2 μm that is the abovedifference to connect the electrode 102 and the second aluminum bump 401without fail.

Seventh Embodiment

FIG. 12

Next, the embodiment in the case where the connection effective regionis increased in area by improving the passivation opening is described.FIG. 12 is a plane view of the case where the bump shape is an octagonand a sectional view along a B—B line thereof.

In the drawing, illustrated on the upper side is the plane view of thisembodiment. An Ra corresponds to a diameter of a step that the secondaluminum bump 401 forms. An Rb shows a diameter of a step caused by astep that the thickness of the polysilicon layer 413 and the under-bumpinsulation layer 412 form. An Rc shows a diameter of a step caused by astep that the first aluminum layer 402 forms.

An h1 shows a square opening portion of the passivation, an h2 is arectangular opening portion of the passivation, and an h3 is a circleopening portion of the passivation. A PV diameter “a” is a length of aside of the opening h1, a PV diameter “b” is the smallest diameter ofthe opening h2, and a PV diameter “c” is a length of the opening h3diameter.

The PV diameter “a” and the PV diameter “c” are shorter than 1.5 timesthe minimum conductive particle diameter Ds in FIG. 10. Only oneconductive particle enters any PV openings even in the worst case.

In the case of the rectangle such as the opening h2 with the PV diameter“b”, the longer side is made 1.5 times less than the minimum conductiveparticle diameter Ds, whereby no more than one minimum conductiveparticle enters it. For example, when the minimum conductive particlediameter Ds is 3 μm, the opening h2 with the PV diameter “b” is madeinto a rectangle smaller than 4.5 μm×4.5 μm.

Moreover, the shape of the PV opening may be a circle or an ellipsethough it is not shown. In that case, the long axis (the diameter in thecase of a circle) is shorter in length than 1.5 times the minimumconductive particle diameter Ds.

The connection effective region becomes larger in area by a decrease inarea of the PV opening portion by this invention, resulting in easyconnection with the electrode on the substrate. In other words, theregion necessary for the bump electrode can be small in area as comparedwith that in the conventional structure.

Since the ordinary conductive particle is 2 μm to 5 μm, the region ofthe PV opening portion is 3 μm×3 μm to 7.5 μm×7.5 μm or less, but theconnection with the first aluminum layer 402 thereunder with lowresistance has been experimentally checked.

It should be noted that the conventional region is a region that isformed according to the structure shown in the conventional example, andthus the description thereof is omitted. Further, this embodiment is anexample in which the bump electrode is fabricated using theinterconnections in the integrated circuit, the polysilicon layer usedfor the transistor gate, and the insulation layer on the polysiliconlayer according to Japanese Patent Application No. Hei 10-43140, andalso the remaining structure in Japanese Patent Application No. Hei10-43140 can be similarly used.

Eighth Embodiment

FIG. 13

Next, an embodiment in which the connection effective region isincreased in area by increasing a region of a second aluminum bump 405is explained. FIG. 13 is a sectional view and a plane view in the casewhere the bump is octagon in shape. In the drawing, illustrated on theupper side is a plane view of this embodiment. A diameter “ra” shows adiameter of a step that the thickness of an under-polysilicon layer 413and an under-bump insulation layer 412 form. A diameter “rb” correspondsto a diameter of a step that the second aluminum bump 405 forms. Adiameter “rc” shows a diameter of a step caused by the passivationopening portion 203 a.

The second aluminum bump 405 is formed in such a manner to cover all thesteps that are made up for the bump formation. Therefore, a connectioneffective region 405 a becomes larger in area compared with theconventional one, resulting in easy connection between the integratedcircuit and the electrode on the substrate. In other words, the regionnecessary for the bump electrode can be smaller in area compared withthat in the conventional structure.

The structure of the second aluminum bump 405 covering all the steps isdescribed in this embodiment, but it is natural to employ the structurecovering only the first level. More specifically, the structure ofcovering the first step from the highest position of the second aluminumbump 405, whereby its object can be achieved.

The connection effective region increases in area by the combination ofthe aforesaid first, second, and third embodiments, resulting in a bumpelectrode with certainty and reliability for the ACF mounting.

INDUSTRIAL APPLICABILITY

As has been described, as for the semiconductor device according to thepresent invention, the integrated circuit comprising the bumps thatsurely connect the electrodes on the substrate in the ACF mounting andare stable in structure can be fabricated at low cost.

What is claimed is:
 1. A semiconductor device comprising a polysiliconlayer used for an interconnection and a gate of a transistor, aninsulation layer covering the polysilicon layer, an interconnectionconductor layer formed on the insulation layer, and a bump for inputtingand outputting a power supply or a signal to an integrated circuit, on asurface of a semiconductor chip in which the integrated circuit isformed, wherein a polysilicon film and an insulation film made of thesame materials as those of said polysilicon layer and said insulationlayer, respectively, are provided at a region at which said bump is tobe formed, on the surface of said semiconductor chip; a first conductorwhich covers the insulation film and is electrically connected to saidinterconnection conductor layer is made of the same material as that ofsaid interconnection conductor layer by sputtering; a protectioninsulation film which covers surfaces of the first conductor, saidinterconnection conductor layer, and said semiconductor chip and inwhich an opening portion is provided on the first conductor is formed;and a second conductor which conducts to the first conductor through theopening portion is formed on the protection insulation film bysputtering, and wherein said bump is composed of the polysilicon film,the insulation film, the first conductor, and the second conductor, andis formed so that a height of a most projecting end face thereof fromthe surface of said semiconductor chip is higher than those ofprojecting faces of any other parts.
 2. The semiconductor deviceaccording to claim 1, wherein each of said first conductor and saidsecond conductor is made of aluminum.
 3. The semiconductor deviceaccording to claim 1, wherein the most projecting end face of said bumpis covered with a conductive film for preventing surface oxidation.
 4. Asemiconductor device comprising a bump, on a surface of a semiconductorchip in which an integrated circuit is formed, for inputting andoutputting a power supply or a signal to the integrated circuit, whereinon the surface of said semiconductor chip, a first conductor which iselectrically connected to said integrated circuit; a protectioninsulation film which covers surfaces of the first conductor and saidsemiconductor chip and in which an opening portion is formed on thefirst conductor; and a second conductor which is formed on theprotection insulation film by sputtering and conducts to the firstconductor through the opening portion, are provided, and wherein theprotection insulation film is formed in such a manner that the filmthickness at a region under the second conductor is thicker than at adifferent region, and said bump is composed of the first conductor andthe second conductor and is formed so that a height of a most projectingend face thereof from the surface of said semiconductor chip is higherthan those of projecting faces of any other parts.
 5. The semiconductordevice according to claim 4, wherein each of said first conductor andsaid second conductor is made of aluminum.
 6. The semiconductor deviceaccording to claim 4, wherein the most projecting end face of said bumpis covered with a conductive film for preventing surface oxidation.
 7. Asemiconductor device comprising a bump, on a surface of a semiconductorchip in which an integrated circuit is formed, for inputting andoutputting a power supply or a signal to the integrated circuit, andmounted on a substrate with an anisotropic conductive film containing alarge number of conductive particles therebetween, wherein on thesurface of said semiconductor chip, a first conductor which iselectrically connected to said integrated circuit; a protectioninsulation film which covers surfaces of the first conductor and saidsemiconductor chip and in which a through hole is formed on the firstconductor; and a second conductor which is formed on the protectioninsulation film by sputtering and conducts to the first conductorthrough the through hole, are provided, and wherein said bump iscomposed of the first conductor and the second conductor, and is formedso that a height of a most projecting end face thereof from the surfaceof said semiconductor chip is higher than those of projecting faces ofany other parts by an error in diameter of the large number ofconductive particles contained in said anisotropic conductive film ormore.
 8. The semiconductor device according to claim 7, wherein amaximum opening dimension of the through hole formed in said protectioninsulation film is within 1.5 times a minimum diameter of the largenumber of conductive particles contained in said anisotropic conductivefilm.
 9. The semiconductor device according to claim 7, wherein thethrough hole formed in the protection insulation film is composed of onein any one shape of a square, a rectangle, a polygon, a circle, or anellipse, or ones in a plurality of shapes out of these.
 10. Thesemiconductor device according to claim 7, wherein the second conductoris formed in an area larger than a region within which a step is formedat the protection insulation film caused by a step of the firstconductor.
 11. The semiconductor device according to claim 7, whereinthe most projecting end face of said bump is covered with a conductivefilm for preventing surface oxidation.